252 search results - page 3 / 51 » A novel high throughput reconfigurable FPGA architecture |
ICC
2007
IEEE
15 years 3 months ago
2007
IEEE
— Network Intrusion Detection Systems (NIDS) are more and more important for identifying and preventing the malicious attacks over the network. This paper proposes a novel cost-e...
IPPS
2007
IEEE
15 years 3 months ago
2007
IEEE
This paper proposes a novel architecture supporting dynamic load balancing on an FPGA for a Molecular Dynamics algorithm. Load balancing is primarily achieved through the use of s...
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FPGA
2010
ACM
14 years 9 months ago
2010
ACM
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
DAC
2005
ACM
15 years 10 months ago
2005
ACM
This paper presents two novel and high performance hardware architectures, implemented in FPGA technology, for the KASUMI block cipher; this algorithm lies at the core of the conf...
VLSID
2007
IEEE
15 years 10 months ago
2007
IEEE
In the past, Field Programmable Gate Array (FPGA) circuits only contained a limited amount of logic and operated at a low frequency. Few applications running on FPGAs consumed exc...