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» A parallel LLL algorithm
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103
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DAC
2006
ACM
16 years 1 months ago
Programming models and HW-SW interfaces abstraction for multi-processor SoC
ing models and HW-SW Interfaces Abstraction for Multi-Processor SoC Ahmed A. Jerraya TIMA Laboratory 46 Ave Felix Viallet 38031 Grenoble CEDEX, France +33476574759 Ahmed.Jerraya@im...
Ahmed Amine Jerraya, Aimen Bouchhima, Fréd&...
137
Voted
PPOPP
2009
ACM
16 years 1 months ago
OpenMP to GPGPU: a compiler framework for automatic translation and optimization
GPGPUs have recently emerged as powerful vehicles for generalpurpose high-performance computing. Although a new Compute Unified Device Architecture (CUDA) programming model from N...
Seyong Lee, Seung-Jai Min, Rudolf Eigenmann
PPOPP
2009
ACM
16 years 1 months ago
Formal verification of practical MPI programs
This paper considers the problem of formal verification of MPI programs operating under a fixed test harness for safety properties without building verification models. In our app...
Anh Vo, Sarvani S. Vakkalanka, Michael Delisi, Gan...
IISWC
2009
IEEE
15 years 7 months ago
SD-VBS: The San Diego Vision Benchmark Suite
—In the era of multi-core, computer vision has emerged as an exciting application area which promises to continue to drive the demand for both more powerful and more energy effi...
Sravanthi Kota Venkata, Ikkjin Ahn, Donghwan Jeon,...
113
Voted
CLUSTER
2007
IEEE
15 years 7 months ago
Balancing productivity and performance on the cell broadband engine
— The Cell Broadband Engine (BE) is a heterogeneous multicore processor, combining a general-purpose POWER architecture core with eight independent single-instructionmultiple-dat...
Sadaf R. Alam, Jeremy S. Meredith, Jeffrey S. Vett...