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» A proposal for parallel self-adjusting computation
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108
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VLSISP
2008
132views more  VLSISP 2008»
15 years 20 days ago
Serial and Parallel FPGA-based Variable Block Size Motion Estimation Processors
H.264/AVC is the latest video coding standard adopting variable block size motion estimation (VBS-ME), quarter-pixel accuracy, motion vector prediction and multi-reference frames f...
Brian M. H. Li, Philip Heng Wai Leong
HIPC
2009
Springer
14 years 10 months ago
A performance prediction model for the CUDA GPGPU platform
The significant growth in computational power of modern Graphics Processing Units(GPUs) coupled with the advent of general purpose programming environments like NVIDA's CUDA,...
Kishore Kothapalli, Rishabh Mukherjee, M. Suhail R...
87
Voted
SAC
2004
ACM
15 years 6 months ago
A parallel algorithm for the extraction of structured motifs
In this work we propose a parallel algorithm for the efficient extraction of binding-site consensus from genomic sequences. This algorithm, based on an existing approach, extracts...
Alexandra M. Carvalho, Arlindo L. Oliveira, Ana T....
CF
2009
ACM
15 years 5 months ago
Data parallel acceleration of decision support queries using Cell/BE and GPUs
Decision Support System (DSS) workloads are known to be one of the most time-consuming database workloads that processes large data sets. Traditionally, DSS queries have been acce...
Pedro Trancoso, Despo Othonos, Artemakis Artemiou
103
Voted
CF
2007
ACM
15 years 4 months ago
Massively parallel processing on a chip
MppSoC is a SIMD architecture composed of a grid of processors and memories connected by a X-Net neighbourhood network and a general purpose global router. MppSoC is an evolution ...
Philippe Marquet, Simon Duquennoy, Sébastie...