Sciweavers

327 search results - page 55 / 66
» A reconfigurable stochastic architecture for highly reliable...
Sort
View
87
Voted
HPCA
2005
IEEE
15 years 10 months ago
Tapping ZettaRAMTM for Low-Power Memory Systems
ZettaRAMTM is a new memory technology under development by ZettaCoreTM as a potential replacement for conventional DRAM. The key innovation is replacing the conventional capacitor...
Ravi K. Venkatesan, Ahmed S. Al-Zawawi, Eric Roten...
82
Voted
IPPS
2007
IEEE
15 years 3 months ago
Creating a Robust Desktop Grid using Peer-to-Peer Services
The goal of the work described in this paper is to design and build a scalable infrastructure for executing grid applications on a widely distributed set of resources. Such grid i...
Jik-Soo Kim, Beomseok Nam, Michael A. Marsh, Peter...
EUROSYS
2006
ACM
15 years 6 months ago
Reducing TCB complexity for security-sensitive applications: three case studies
The large size and high complexity of securitysensitive applications and systems software is a primary cause for their poor testability and high vulnerability. One approach to all...
Lenin Singaravelu, Calton Pu, Hermann Härtig,...
LCTRTS
2009
Springer
15 years 4 months ago
A compiler optimization to reduce soft errors in register files
Register file (RF) is extremely vulnerable to soft errors, and traditional redundancy based schemes to protect the RF are prohibitive not only because RF is often in the timing c...
Jongeun Lee, Aviral Shrivastava
ISCA
2008
IEEE
142views Hardware» more  ISCA 2008»
15 years 4 months ago
Improving NAND Flash Based Disk Caches
Flash is a widely used storage device that provides high density and low power, appealing properties for general purpose computing. Today, its usual application is in portable spe...
Taeho Kgil, David Roberts, Trevor N. Mudge