Sciweavers

1513 search results - page 38 / 303
» A self-describing data transfer model for ITS applications
Sort
View
WMPI
2004
ACM
15 years 5 months ago
SCIMA-SMP: on-chip memory processor architecture for SMP
Abstract. In this paper, we propose a processor architecture with programmable on-chip memory for a high-performance SMP (symmetric multi-processor) node named SCIMA-SMP (Software ...
Chikafumi Takahashi, Masaaki Kondo, Taisuke Boku, ...
NETWORKING
2008
15 years 1 months ago
Modeling Priority-Based Incentive Policies for Peer-Assisted Content Delivery Systems
Content delivery providers can improve their service scalability and offload their servers by making use of content transfers among their clients. To provide peers with incentive t...
Niklas Carlsson, Derek L. Eager
HPDC
2007
IEEE
15 years 3 months ago
MOB: zero-configuration high-throughput multicasting for grid applications
Grid applications often need to distribute large amounts of data efficiently from one cluster to multiple others (multicast). Existing methods usually arrange nodes in optimized t...
Mathijs den Burger, Thilo Kielmann
RTSS
2007
IEEE
15 years 6 months ago
Bus Access Optimization for Predictable Implementation of Real-Time Applications on Multiprocessor Systems-on-Chip
In multiprocessor systems, the traffic on the bus does not solely originate from data transfers due to data dependencies between tasks, but is also affected by memory transfers a...
Jakob Rosen, Alexandru Andrei, Petru Eles, Zebo Pe...
GLOBECOM
2006
IEEE
15 years 5 months ago
Price-Sensitive Application Adaptation in Deadline-Based Networks
— In deadline-based networks, the delay performance experienced by real-time data transfer largely depends on traffic deadlines and the load level along the data transfer path. ...
Xiao Huan Liu, Yanni Ellen Liu