44 search results - page 4 / 9 » A system-level methodology for fast multi-objective design s... |
IPPS
2003
IEEE
13 years 11 months ago
2003
IEEE
To cope with the increasing demand for higher computational power and flexibility, dynamically reconfigurable blocks become an important part inside a system-on-chip. Several meth...
ICCD
2005
IEEE
14 years 3 months ago
2005
IEEE
Recent advances in Dynamic Power Management (DPM) techniques have resulted in designs that support a rich set of power management options, both at the hardware and software levels...
VLSID
2005
IEEE
14 years 6 months ago
2005
IEEE
Abstract--Power analysis early in the design cycle is critical for the design of lowpower systems. With the move to system-level specifications and design methodologies, there has ...
DAC
2006
ACM
14 years 7 months ago
2006
ACM
Pareto surfaces in the performance space determine the range of feasible performance values for a circuit topology in a given technology. We present a non-dominated sorting based ...
DAC
2008
ACM
14 years 7 months ago
2008
ACM
In this paper, a novel automatic approach for the concurrent topology and routing optimization that achieves a high quality network layout is proposed. This optimization is based ...