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AICCSA
2006
IEEE
134views Hardware» more  AICCSA 2006»
15 years 7 months ago
The vMatrix: Equi-Ping Game Server Placement For Pre-Arranged First-Person-Shooter Multiplayer Matches
Today most multiplayer game servers are pre-located statically, which makes it hard for gamers to find equi-ping hosts for their matches. This is especially important for first per...
Amr Awadallah, Mendel Rosenblum
CODES
2006
IEEE
15 years 7 months ago
Integrated analysis of communicating tasks in MPSoCs
Predicting timing behavior is key to efficient embedded real-time system design and verification. Especially memory accesses and co-processor calls over shared communication net...
Simon Schliecker, Matthias Ivers, Rolf Ernst
CODES
2006
IEEE
15 years 7 months ago
System-level power-performance trade-offs in bus matrix communication architecture synthesis
System-on-chip communication architectures have a significant impact on the performance and power consumption of modern multiprocessor system-on-chips (MPSoCs). However, customiza...
Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi,...
SACMAT
2006
ACM
15 years 7 months ago
PRIMA: policy-reduced integrity measurement architecture
We propose an integrity measurement approach based on information flow integrity, which we call the Policy-Reduced Integrity Measurement Architecture (PRIMA). The recent availabi...
Trent Jaeger, Reiner Sailer, Umesh Shankar
CODES
2005
IEEE
15 years 7 months ago
High-level synthesis for large bit-width multipliers on FPGAs: a case study
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
Gang Quan, James P. Davis, Siddhaveerasharan Devar...