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DSD
2004
IEEE
129views Hardware» more  DSD 2004»
15 years 7 months ago
Functional Validation of Programmable Architectures
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current Systemon-Chip design metho...
Prabhat Mishra, Nikil D. Dutt
139
Voted
RTAS
2010
IEEE
15 years 1 months ago
Timing Analysis for TDMA Arbitration in Resource Sharing Systems
Abstract--Modern computing systems have adopted multicore architectures and multiprocessor systems on chip (MPSoCs) for accommodating the increasing demand on computation power. Ho...
Andreas Schranzhofer, Jian-Jia Chen, Lothar Thiele
PODC
2009
ACM
16 years 4 months ago
Partial synchrony based on set timeliness
d Abstract] Marcos K. Aguilera Microsoft Research Silicon Valley Mountain View, CA, USA Carole Delporte-Gallet Universit? Paris 7 Paris, France Hugues Fauconnier Universit? Paris ...
Marcos Kawazoe Aguilera, Carole Delporte-Gallet, H...
160
Voted
AC
2005
Springer
15 years 3 months ago
Power Analysis and Optimization Techniques for Energy Efficient Computer Systems
Reducing power consumption has become a major challenge in the design and operation of today's computer systems. This chapter describes different techniques addressing this c...
Wissam Chedid, Chansu Yu, Ben Lee
196
Voted
IWQOS
2011
Springer
14 years 6 months ago
OLIC: OnLine Information Compression for scalable hosting infrastructure monitoring
—Quality-of-service (QoS) management often requires a continuous monitoring service to provide updated information about different hosts and network links in the managed system. ...
Yongmin Tan, Xiaohui Gu, Vinay Venkatesh