142 search results - page 16 / 29 » Abstraction-guided synthesis of synchronization |
ISVC
2009
Springer
15 years 5 months ago
2009
Springer
We describe a new technique to extract the boundary of a walking subject, with ability to predict movement in missing frames. This paper uses a level sets representation of the tra...
102
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ENTCS
2008
14 years 11 months ago
2008
This paper reports on the design of a test chip built to test a) a new latency insensitive network fabric protocol and circuits, b) a new synchronizer design, and c) how efficient...
109
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LCTRTS
2010
Springer
14 years 9 months ago
2010
Springer
Concurrent Action-Oriented Specifications (CAOS) model the behavior of a synchronous hardware circuit as asynchronous guarded at an abstraction level higher than the Register Tran...
IISWC
2008
IEEE
15 years 5 months ago
2008
IEEE
The design and evaluation of microprocessor architectures is a difficult and time-consuming task. Although small, handcoded microbenchmarks can be used to accelerate performance e...
DAC
2004
ACM
16 years 2 days ago
2004
ACM
For multi-gigahertz synchronous designs in nanometer technologies, multiple clock cycles are needed to cross the global interconnects, thus making it necessary to have pipelined g...