Sciweavers

439 search results - page 29 / 88
» Accelerating multi-core simulators
Sort
View
MICRO
2009
IEEE
113views Hardware» more  MICRO 2009»
15 years 4 months ago
The BubbleWrap many-core: popping cores for sequential acceleration
Many-core scaling now faces a power wall. The gap between the number of cores that fit on a die and the number that can operate simultaneously under the power budget is rapidly i...
Ulya R. Karpuzcu, Brian Greskamp, Josep Torrellas
CODES
2004
IEEE
15 years 1 months ago
A loop accelerator for low power embedded VLIW processors
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
Binu K. Mathew, Al Davis
MICRO
2010
IEEE
130views Hardware» more  MICRO 2010»
14 years 7 months ago
Pseudo-Circuit: Accelerating Communication for On-Chip Interconnection Networks
As the number of cores on a single chip increases with more recent technologies, a packet-switched on-chip interconnection network has become a de facto communication paradigm for ...
Minseon Ahn, Eun Jung Kim
CODES
2007
IEEE
15 years 4 months ago
Thread warping: a framework for dynamic synthesis of thread accelerators
We present a dynamic optimization technique, thread warping, that uses a single processor on a multiprocessor system to dynamically synthesize threads into custom accelerator circ...
Greg Stitt, Frank Vahid
CLUSTER
2000
IEEE
15 years 2 months ago
Multi-Grid Acceleration of a SIMPLE-Based CFD-Code and Aspects of Parallelization
The present study treats the calculation of the continuous phase of a multiphase flow, i.e. the numerical solution of the equations for a turbulent incompressible flow. An exist...
Klaus Bernert, Thomas Frank, Hellfried Schneider, ...