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HICSS
1996
IEEE
102views Biometrics» more  HICSS 1996»
15 years 6 months ago
Evaluation of Parallel Logic Simulation Using DVSIM
Parallel simulation is expected to speed up simulation run time in a signi cant way. This paper describes a framework that is used to evaluate the performance of parallel simulati...
Gerd Meister
DAC
1996
ACM
15 years 6 months ago
A Parallel Precorrected FFT Based Capacitance Extraction Program for Signal Integrity Analysis
In order to optimize interconnect to avoid signal integrity problems, very fast and accurate 3-D capacitance extraction is essential. Fast algorithms, such as the multipole or prec...
Narayan R. Aluru, V. B. Nadkarni, James White
ARC
2007
Springer
123views Hardware» more  ARC 2007»
15 years 6 months ago
Multiple Sequence Alignment Using Reconfigurable Computing
The alignment of multiple protein (or DNA) sequences is a current problem in Bioinformatics. ClustalW is the most popular heuristic algorithm for multiple sequence alignment. Pairw...
Carlos R. Erig Lima, Heitor S. Lopes, Maiko R. Mor...
ASPDAC
2007
ACM
80views Hardware» more  ASPDAC 2007»
15 years 6 months ago
Recognition of Fanout-free Functions
Factoring is a logic minimization technique to represent a Boolean function in an equivalent function with minimum literals. When realizing the circuit, a function represented in ...
Tsung-Lin Lee, Chun-Yao Wang
DAGSTUHL
2007
15 years 3 months ago
An Inner/Outer Stationary Iteration for Computing PageRank
We present a stationary iterative scheme for PageRank computation. The algorithm is based on a linear system formulation of the problem, uses inner/outer iterations, and amounts to...
Andrew P. Gray, Chen Greif, Tracy Lau