276 search results - page 2 / 56 » Accurate and Efficient Static Timing Analysis with Crosstalk |
ICCAD
2003
IEEE
14 years 3 months ago
2003
IEEE
This paper proposes a scheme that captures diverse input waveforms of CMOS gates for static timing analysis. Conventionally the latest arrival time and transition time are calcula...
ET
2002
13 years 6 months ago
2002
Due to technology scaling and increasing clock frequency, problems due to noise effects lead to an increase in design/debugging efforts and a decrease in circuit performance. This...
DATE
2000
IEEE
13 years 10 months ago
2000
IEEE
Capacitance coupling can have a significant impact on gate delay in today's deep submicron circuits. In this paper we present a static timing analysis tool that calculates th...
GLVLSI
2006
IEEE
14 years 9 days ago
2006
IEEE
Process variations have become a key concern of circuit designers because of their significant, yet hard to predict impact on performance and signal integrity of VLSI circuits. St...
ITC
2003
IEEE
13 years 11 months ago
2003
IEEE
A technique to derive test vectors that exercise the worstcase delay effects in a domino circuit in the presence of crosstalk is described. A model for characterizing the delay of...