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RSP
2003
IEEE
132views Control Systems» more  RSP 2003»
13 years 11 months ago
Rapid Exploration of Pipelined Processors through Automatic Generation of Synthesizable RTL Models
As embedded systems continue to face increasingly higher performance requirements, deeply pipelined processor architectures are being employed to meet desired system performance. ...
Prabhat Mishra, Arun Kejariwal, Nikil Dutt
ISSTA
2006
ACM
14 years 11 days ago
Towards supporting the architecture design process through evaluation of design alternatives
This paper addresses issues involved when an architect explore alternative designs including non-functional requirements; in our approach, non-functional requirements are expresse...
Lihua Xu, Scott A. Hendrickson, Eric Hettwer, Hada...
CVPR
2007
IEEE
14 years 8 months ago
OpenVL: Towards A Novel Software Architecture for Computer Vision
This paper presents our progress on OpenVL - a novel software architecture to address efficiency through facilitating hardware acceleration, reusability and scalability for comput...
Changsong Shen, S. Sidney Fels, James J. Little
ISCAS
1999
IEEE
113views Hardware» more  ISCAS 1999»
13 years 10 months ago
Energy efficient software through dynamic voltage scheduling
The energy usage of computer systems is becoming important, especially for portablebattery-operated applications and embedded systems. A significant reduction in the energy consum...
Gangadhar Konduri, James Goodman, Anantha Chandrak...
ECRTS
2008
IEEE
13 years 6 months ago
ORTEGA: An Efficient and Flexible Software Fault Tolerance Architecture for Real-Time Control Systems
Fault tolerance is an important aspect in real-time computing. In real-time control systems, tasks could be faulty due to various reasons. Faulty tasks may compromise the performa...
Xue Liu, Hui Ding, Kihwal Lee, Qixin Wang, Lui Sha