433 search results - page 46 / 87 » Activity-driven clock design for low power circuits |
ASPDAC
2005
ACM
15 years 7 months ago
2005
ACM
- Domino logic is used extensively in high speed microprocessor datapath design. Although domino gates have small propagation delay, they consume relatively more power. We propose ...
110
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FPGA
2005
ACM
15 years 7 months ago
2005
ACM
Vdd-programmable FPGAs have been proposed recently to reduce FPGA power, where Vdd levels can be customized for different circuit elements and unused circuit elements can be powe...
107
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PIMRC
2008
IEEE
15 years 8 months ago
2008
IEEE
Sensor network applications are generally characterized by long idle durations and intermittent communication patterns. The traffic loads are typically so low that overall idle d...
SLIP
2009
ACM
15 years 8 months ago
2009
ACM
A novel high-level approach for estimating power consumption of global interconnects in data-path oriented designs implemented in FPGAs is presented. The methodology is applied to...
101
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GLVLSI
2003
IEEE
15 years 7 months ago
2003
IEEE
The current trends in high performance integrated circuits are towards faster and more powerful circuits in the giga-hertz range and even further. As the more complex Integrated C...