433 search results - page 80 / 87 » Activity-driven clock design for low power circuits |
76
Voted
ISLPED
2009
ACM
15 years 6 months ago
2009
ACM
On-chip communication, including short, often-multicast, latency-critical coherence and synchronization messages, and long, unicast, throughput-sensitive data transfer, limits the...
IPPS
2007
IEEE
15 years 6 months ago
2007
IEEE
1 FPGAs are an appealing solution for the space-based remote sensing applications. However, in a low-earth orbit, configuration bits of SRAM-based FPGAs are susceptible to single-e...
103
Voted
ISLPED
2010
ACM
14 years 12 months ago
2010
ACM
We have developed a system architecture, measuring and modeling techniques, and algorithms for on-line power and energy optimization and thermal management. The starting point for...
DAC
2006
ACM
16 years 19 days ago
2006
ACM
As VLSI technology scales toward 65nm and beyond, both timing and power performance of integrated circuits are increasingly affected by process variations. In practice, people oft...
94
Voted
TVLSI
2008
14 years 11 months ago
2008
-- Aggressive CMOS scaling results in low threshold voltage and thin oxide thickness for transistors manufactured in deep submicron regime. As a result, reducing the subthreshold a...