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» Adaptive Techniques for Improving Delay Fault Diagnosis
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ICES
2007
Springer
70views Hardware» more  ICES 2007»
14 years 11 months ago
Evolutionary Design of Generic Combinational Multipliers Using Development
Combinational multipliers represent a class of circuits that is usually considered to be hard to design by means of the evolutionary techniques. However, experiments conducted unde...
Michal Bidlo
PAMI
2008
161views more  PAMI 2008»
14 years 9 months ago
Multilayered 3D LiDAR Image Construction Using Spatial Models in a Bayesian Framework
Standard 3D imaging systems process only a single return at each pixel from an assumed single opaque surface. However, there are situations when the laser return consists of multip...
Sergio Hernandez-Marin, Andrew M. Wallace, Gavin J...
HPCA
2006
IEEE
15 years 9 months ago
Efficient instruction schedulers for SMT processors
We propose dynamic scheduler designs to improve the scheduler scalability and reduce its complexity in the SMT processors. Our first design is an adaptation of the recently propos...
Joseph J. Sharkey, Dmitry V. Ponomarev
ICS
2005
Tsinghua U.
15 years 3 months ago
Reducing latencies of pipelined cache accesses through set prediction
With the increasing performance gap between the processor and the memory, the importance of caches is increasing for high performance processors. However, with reducing feature si...
Aneesh Aggarwal
ICCAD
2006
IEEE
103views Hardware» more  ICCAD 2006»
15 years 6 months ago
A statistical framework for post-silicon tuning through body bias clustering
Adaptive body biasing (ABB) is a powerful technique that allows post-silicon tuning of individual manufactured dies such that each die optimally meets the delay and power constrai...
Sarvesh H. Kulkarni, Dennis Sylvester, David Blaau...