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» Address Code Generation for Digital Signal Processors
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CCS
2007
ACM
15 years 3 months ago
Analyzing network traffic to detect self-decrypting exploit code
Remotely-launched software exploits are a common way for attackers to intrude into vulnerable computer systems. As detection techniques improve, remote exploitation techniques are...
Qinghua Zhang, Douglas S. Reeves, Peng Ning, S. Pu...
SAC
2009
ACM
15 years 6 months ago
GTfold: a scalable multicore code for RNA secondary structure prediction
The prediction of the correct secondary structures of large RNAs is one of the unsolved challenges of computational molecular biology. Among the major obstacles is the fact that a...
Amrita Mathuriya, David A. Bader, Christine E. Hei...
ICIP
2003
IEEE
16 years 1 months ago
Systematic lossy forward error protection for video waveforms
A novel scheme for error-resilient digital video broadcasting, using Wyner-Ziv coding, is presented in this paper. We apply the general framework of systematic lossy source-channe...
Anne Aaron, Shantanu Rane, David Rebollo-Monedero,...
IPPS
2007
IEEE
15 years 6 months ago
Splice: A Standardized Peripheral Logic and Interface Creation Engine
Recent advancements in FPGA technology have allowed manufacturers to place general-purpose processors alongside user-configurable logic gates on a single chip. At first glance, ...
Justin Thiel, Ron K. Cytron
KES
2005
Springer
15 years 5 months ago
Reconfigurable Power-Aware Scalable Booth Multiplier
Abstract. An energy-efficient power-aware design is highly desirable for digital signal processing functions that encounter a wide diversity of operating scenarios in battery-power...
Hanho Lee