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PDP
2010
IEEE
15 years 2 months ago
Energy-Efficient Hardware Prefetching for CMPs Using Heterogeneous Interconnects
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...
Antonio Flores, Juan L. Aragón, Manuel E. A...
171
Voted
ISCA
2012
IEEE
333views Hardware» more  ISCA 2012»
13 years 17 days ago
Reducing memory reference energy with opportunistic virtual caching
Most modern cores perform a highly-associative translation look aside buffer (TLB) lookup on every memory access. These designs often hide the TLB lookup latency by overlapping it...
Arkaprava Basu, Mark D. Hill, Michael M. Swift
ECCV
2002
Springer
16 years 5 hour ago
What Energy Functions Can Be Minimized via Graph Cuts?
In the last few years, several new algorithms based on graph cuts have been developed to solve energy minimization problems in computer vision. Each of these techniques constructs...
Vladimir Kolmogorov, Ramin Zabih
CORR
2010
Springer
254views Education» more  CORR 2010»
14 years 8 months ago
Information-Theoretic Analysis of an Energy Harvesting Communication System
—In energy harvesting communication systems, an exogenous recharge process supplies energy for the data transmission and arriving energy can be buffered in a battery before consu...
Omur Ozel, Sennur Ulukus
DAC
2005
ACM
15 years 11 months ago
Fault and energy-aware communication mapping with guaranteed latency for applications implemented on NoC
As feature sizes shrink, transient failures of on-chip network links become a critical problem. At the same time, many applications require guarantees on both message arrival prob...
Sorin Manolache, Petru Eles, Zebo Peng