644 search results - page 21 / 129 » An Experimental Chip to Evaluate Test Techniques: Experiment... |
CHES
2003
Springer
15 years 5 months ago
2003
Springer
Abstract. Balanced asynchronous circuits have been touted as a superior replacement for conventional synchronous circuits. To assess these claims, we have designed, manufactured an...
DFT
2006
IEEE
15 years 5 months ago
2006
IEEE
1 High temperature has become a major problem for system-on-chip testing. In order to reduce the test time while keeping the temperature of the chip under test within a safe range,...
DAC
2008
ACM
16 years 25 days ago
2008
ACM
In modular testing of system-on-a-chip (SoC), test access mechanisms (TAMs) are used to transport test data between the input/output pins of the SoC and the cores under test. Prio...
CLEF
2006
Springer
15 years 3 months ago
2006
Springer
This paper reports on experiments submitted for the robust task at CLEF 2006 ad intended to provide a baseline for other runs for the robust task. We applied a system previously t...
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HPCA
2006
IEEE
16 years 5 days ago
2006
IEEE
Computer systems increasingly rely on dynamic, phasebased system management techniques, in which system hardware and software parameters may be altered or tuned at runtime for dif...