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» An Extended Interpreted System Model for Epistemic Logics
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LPAR
2007
Springer
15 years 4 months ago
Completeness and Decidability in Sequence Logic
Sequence logic is a parameterized logic where the formulas are sequences of formulas of some arbitrary underlying logic. The sequence formulas are interpreted in certain linearly o...
Marc Bezem, Tore Langholm, Michal Walicki
LATA
2010
Springer
15 years 7 months ago
Verifying Complex Continuous Real-Time Systems with Coinductive CLP(R)
Timed automata has been used as a powerful formalism for specifying, designing, and analyzing real time systems. We consider the generalization of timed automata to Pushdown Timed ...
Neda Saeedloei and Gopal Gupta
ISMVL
2007
IEEE
104views Hardware» more  ISMVL 2007»
15 years 4 months ago
Evaluation of Toggle Coverage for MVL Circuits Specified in the SystemVerilog HDL
Designing modern circuits comprised of millions of gates is a very challenging task. Therefore new directions are investigated for efficient modeling and verification of such syst...
Mahsan Amoui, Daniel Große, Mitchell A. Thor...
ACOM
2006
Springer
15 years 3 months ago
Temporal Logics for Representing Agent Communication Protocols
Abstract. This paper explores the use of temporal logics in the context of communication protocols for multiagent systems. We concentrate on frameworks where protocols are used to ...
Ulle Endriss
FASE
2008
Springer
14 years 11 months ago
A Model Checking Approach for Verifying COWS Specifications
We introduce a logical verification framework for checking functional properties of service-oriented applications formally specified using the service specification language COWS. ...
Alessandro Fantechi, Stefania Gnesi, Alessandro La...