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VLSID
2008
IEEE
138views VLSI» more  VLSID 2008»
15 years 9 months ago
Memory Architecture Exploration Framework for Cache Based Embedded SOC
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...
T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindaraj...
ICCAD
2008
IEEE
105views Hardware» more  ICCAD 2008»
15 years 6 months ago
Parameterized transient thermal behavioral modeling for chip multiprocessors
In this paper, we propose a new architecture-level parameterized transient thermal behavioral modeling algorithm for emerging thermal related design and optimization problems for ...
Duo Li, Sheldon X.-D. Tan, Eduardo H. Pacheco, Mur...
94
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RTSS
2009
IEEE
15 years 4 months ago
Timing Analysis of Concurrent Programs Running on Shared Cache Multi-Cores
—Memory accesses form an important source of timing unpredictability. Timing analysis of real-time embedded software thus requires bounding the time for memory accesses. Multipro...
Yan Li, Vivy Suhendra, Yun Liang, Tulika Mitra, Ab...
DSN
2008
IEEE
15 years 3 months ago
An integrated approach to resource pool management: Policies, efficiency and quality metrics
: The consolidation of multiple servers and their workloads aims to minimize the number of servers needed thereby enabling the efficient use of server and power resources. At the s...
Daniel Gmach, Jerry Rolia, Ludmila Cherkasova, Gui...
HRI
2006
ACM
15 years 3 months ago
Interaction debugging: an integral approach to analyze human-robot interaction
Along with the development of interactive robots, controlled experiments and field trials are regularly conducted to stage human-robot interaction. Experience in this field has sh...
Tijn Kooijmans, Takayuki Kanda, Christoph Bartneck...