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IPPS
1998
IEEE
15 years 1 months ago
Partitioned Schedules for Clustered VLIW Architectures
This paper presents results on a new approach to partitioning a modulo-scheduled loop for distributed execution on parallel clusters of functional units organized as a VLIW machin...
Marcio Merino Fernandes, Josep Llosa, Nigel P. Top...
MICRO
2005
IEEE
130views Hardware» more  MICRO 2005»
15 years 3 months ago
Exploiting Vector Parallelism in Software Pipelined Loops
An emerging trend in processor design is the addition of short vector instructions to general-purpose and embedded ISAs. Frequently, these extensions are employed using traditiona...
Samuel Larsen, Rodric M. Rabbah, Saman P. Amarasin...
ICPADS
2006
IEEE
15 years 3 months ago
SPM Conscious Loop Scheduling for Embedded Chip Multiprocessors
One of the major factors that can potentially slow down widespread use of embedded chip multiprocessors is lack of efficient software support. In particular, automated code paral...
Liping Xue, Mahmut T. Kandemir, Guangyu Chen, Tayl...
CASES
2009
ACM
15 years 4 months ago
Optimal loop parallelization for maximizing iteration-level parallelism
This paper solves the open problem of extracting the maximal number of iterations from a loop that can be executed in parallel on chip multiprocessors. Our algorithm solves it opt...
Duo Liu, Zili Shao, Meng Wang, Minyi Guo, Jingling...