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CJ
2006
84views more  CJ 2006»
14 years 9 months ago
Instruction Level Parallelism through Microthreading - A Scalable Approach to Chip Multiprocessors
Most microprocessor chips today use an out-of-order instruction execution mechanism. This mechanism allows superscalar processors to extract reasonably high levels of instruction ...
Kostas Bousias, Nabil Hasasneh, Chris R. Jesshope
EPIA
1999
Springer
15 years 1 months ago
YapOr: an Or-Parallel Prolog System Based on Environment Copying
YapOr is an or-parallel system that extends the Yap Prolog system to exploit implicit or-parallelism in Prolog programs. It is based on the environment copying model, as first imp...
Ricardo Rocha, Fernando M. A. Silva, Vítor ...
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IEEEPACT
2002
IEEE
15 years 2 months ago
Software Bubbles: Using Predication to Compensate for Aliasing in Software Pipelines
This paper describes a technique for utilizing predication to support software pipelining on EPIC architectures in the presence of dynamic memory aliasing. The essential idea is t...
Benjamin Goldberg, Emily Crutcher, Chad Huneycutt,...
IFIP
1998
Springer
15 years 1 months ago
Combining Static Partitioning with Dynamic Distribution of Threads
This paper presents a hybrid approach to automatic parallelization of computer programs which combines static extraction of threads (tasks) with dynamic scheduling for parallel an...
Ronald Moore, Melanie Klang, Bernd Klauer, Klaus W...
PPOPP
2006
ACM
15 years 3 months ago
Optimizing irregular shared-memory applications for distributed-memory systems
In prior work, we have proposed techniques to extend the ease of shared-memory parallel programming to distributed-memory platforms by automatic translation of OpenMP programs to ...
Ayon Basumallik, Rudolf Eigenmann