Sciweavers

1263 search results - page 195 / 253
» An Object-Passing Model for Parallel Programming
Sort
View
170
Voted
ITNG
2010
IEEE
15 years 1 months ago
Record Setting Software Implementation of DES Using CUDA
—The increase in computational power of off-the-shelf hardware offers more and more advantageous tradeoffs among efficiency, cost and availability, thus enhancing the feasibil...
Giovanni Agosta, Alessandro Barenghi, Fabrizio De ...
EWC
2011
84views more  EWC 2011»
14 years 10 months ago
A theoretical framework for an intelligent design catalogue
This paper outlines continuing work on the intelligent design catalogue. The intelligent design catalogue seeks to create a virtual design environment that is linked to a catalogu...
Paul Winkelman
144
Voted
IPPS
2009
IEEE
15 years 10 months ago
Accelerating error correction in high-throughput short-read DNA sequencing data with CUDA
Emerging DNA sequencing technologies open up exciting new opportunities for genome sequencing by generating read data with a massive throughput. However, produced reads are signif...
Haixiang Shi, Bertil Schmidt, Weiguo Liu, Wolfgang...
ICASSP
2008
IEEE
15 years 9 months ago
Address assignment sensitive variable partitioning and scheduling for DSPS with multiple memory banks
Multiple memory banks design is employed in many high performance DSP processors. This architectural feature supports higher memory bandwidth by allowing multiple data memory acce...
Chun Jason Xue, Tiantian Liu, Zili Shao, Jingtong ...
HPDC
2007
IEEE
15 years 9 months ago
Precise and realistic utility functions for user-centric performance analysis of schedulers
Utility functions can be used to represent the value users attach to job completion as a function of turnaround time. Most previous scheduling research used simple synthetic repre...
Cynthia Bailey Lee, Allan Snavely