3156 search results - page 6 / 632 » An address translation simulator |
CODES
2005
IEEE
15 years 3 months ago
2005
IEEE
Design of programmable processors and embedded applications requires instruction-set simulators for early exploration and validation of candidate architectures. Interpretive simul...
75
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LREC
2008
14 years 11 months ago
2008
In this paper, we propose a new phrase-based translation model based on inter-lingual triggers. The originality of our method is double. First we identify common source phrases. T...
ICPR
2010
IEEE
14 years 7 months ago
2010
IEEE
Brain-computer interfaces rely on accurate decoding of cortical activity to understand intended action. Algorithms for neural decoding can be broadly categorized into two groups: d...
102
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CODES
2009
IEEE
15 years 4 months ago
2009
IEEE
In this paper, we investigate the use of instruction set simulators (ISS) based on binary translation to accelerate full timed multiprocessor system simulation at transaction leve...
ASPLOS
2010
ACM
15 years 4 months ago
2010
ACM
Computer systems with virtual memory are susceptible to design bugs and runtime faults in their address translation (AT) systems. Detecting bugs and faults requires a clear speciï...