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» An address translation simulator
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WMASH
2003
ACM
15 years 2 months ago
MobileNAT: a new technique for mobility across heterogeneous address spaces
We propose a new network layer mobility architecture called MOBILENAT to efficiently support micro and macro-mobility in and across heterogeneous address spaces common in emergin...
Milind M. Buddhikot, Adiseshu Hari, Kundan Singh, ...
ISCA
2006
IEEE
131views Hardware» more  ISCA 2006»
15 years 3 months ago
Reducing Startup Time in Co-Designed Virtual Machines
A Co-Designed Virtual Machine allows designers to implement a processor via a combination of hardware and software. Dynamic binary translation converts code written for a conventi...
Shiliang Hu, James E. Smith
ISSAC
2007
Springer
128views Mathematics» more  ISSAC 2007»
15 years 3 months ago
Productivity and performance using partitioned global address space languages
Partitioned Global Address Space (PGAS) languages combine the programming convenience of shared memory with the locality and performance control of message passing. One such langu...
Katherine A. Yelick, Dan Bonachea, Wei-Yu Chen, Ph...
CSSE
2008
IEEE
15 years 4 months ago
Generation of Executable Representation for Processor Simulation with Dynamic Translation
Instruction-Set Simulators (ISS) are indispensable tools for studying new architectures. There are several alternatives to achieve instruction set simulation, such as interpretive...
Jiajia Song, HongWei Hao, Claude Helmstetter, Vani...
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ISLPED
2005
ACM
98views Hardware» more  ISLPED 2005»
15 years 3 months ago
Synonymous address compaction for energy reduction in data TLB
Modern processors can issue and execute multiple instructions per cycle, often performing multiple memory operations simultaneously. To reduce stalls due to resource conflicts, m...
Chinnakrishnan S. Ballapuram, Hsien-Hsin S. Lee, M...