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» An application based MPI message throughput benchmark
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ISCA
2011
IEEE
386views Hardware» more  ISCA 2011»
14 years 1 months ago
Architecting on-chip interconnects for stacked 3D STT-RAM caches in CMPs
Emerging memory technologies such as STT-RAM, PCRAM, and resistive RAM are being explored as potential replacements to existing on-chip caches or main memories for future multi-co...
Asit K. Mishra, Xiangyu Dong, Guangyu Sun, Yuan Xi...
ISCA
1997
IEEE
108views Hardware» more  ISCA 1997»
15 years 2 months ago
The SGI Origin: A ccNUMA Highly Scalable Server
The SGI Origin 2000 is a cache-coherent non-uniform memory access (ccNUMA) multiprocessor designed and manufactured by Silicon Graphics, Inc. The Origin system was designed from t...
James Laudon, Daniel Lenoski
CASES
2005
ACM
15 years 3 days ago
Architectural support for real-time task scheduling in SMT processors
In Simultaneous Multithreaded (SMT) architectures most hardware resources are shared between threads. This provides a good cost/performance trade-off which renders these architec...
Francisco J. Cazorla, Peter M. W. Knijnenburg, Riz...
CLUSTER
2009
IEEE
15 years 4 months ago
MDCSim: A multi-tier data center simulation, platform
Abstract—Performance and power issues are becoming increasingly important in the design of large cluster based multitier data centers for supporting a multitude of services. Desi...
Seung-Hwan Lim, Bikash Sharma, Gunwoo Nam, Eun-Kyo...
RTAS
1998
IEEE
15 years 2 months ago
Performance Analysis of an RSVP-Capable Router
RSVP is a bandwidth reservation protocol that allows distributed real-time applications such as video-conferencing software to make bandwidth reservations over packetswitched netw...
Tzi-cker Chiueh, Anindya Neogi, Paul A. Stirpe