3120 search results - page 59 / 624 » An optimal architecture for a DDC |
TVLSI
2008
14 years 10 months ago
2008
Reconfigurable hardware has become a well-accepted option for implementing digital signal processing (DSP). Traditional devices such as field-programmable gate arrays offer good fi...
CODES
1999
IEEE
15 years 2 months ago
1999
IEEE
This paper presents an enhancement of our "Algorithm Architecture Adequation" (AAA) prototyping methodology which allows to rapidly develop and optimize the implementati...
DAC
1996
ACM
15 years 2 months ago
1996
ACM
In this paper we address the problem of code generation for basic blocks in heterogeneous memory-register DSP processors. We propose a new a technique, based on register-transfer ...
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CASES
2001
ACM
15 years 1 months ago
2001
ACM
The rapid growth of silicon densities has made it feasible to deploy reconfigurable hardware as a highly parallel computing platform. However, in most cases, the application needs...
ARC
2008
Springer
15 years 3 days ago
2008
Springer
Abstract. This paper presents a real time parallel hardware architecture for image feature detection based on the SIFT (Scale Invariant Feature Transform) algorithm. This architect...