189 search results - page 24 / 38 » An ultra-fast instruction set simulator |
110
click to vote
FLAIRS
2010
14 years 12 months ago
2010
How could computer games be used to augment training for fighter pilots? This paper is aimed at providing one answer to this research question. Three current methods of training f...
135
click to vote
RTAS
2006
IEEE
2006
IEEE
METERG: Measurement-Based End-to-End Performance Estimation Technique in QoS-Capable Multiprocessors
15 years 8 months ago
Multiprocessor systems present serious challenges in the design of real-time systems due to the wider variation of execution time of an instruction sequence compared to a uniproce...
124
click to vote
HPCA
2012
IEEE
13 years 9 months ago
2012
IEEE
Multiprocessor architectures that continuously execute atomic blocks (or chunks) of instructions can improve performance and software productivity. However, all of the prior propo...
137
click to vote
ISCA
2012
IEEE
13 years 4 months ago
2012
IEEE
Modern memory controllers employ sophisticated address mapping, command scheduling, and power management optimizations to alleviate the adverse effects of DRAM timing and resource...
120
click to vote
ACMMSP
2004
ACM
15 years 7 months ago
2004
ACM
As superscalar processors become increasingly wide, it is inevitable that the large set of instructions to be fetched every cycle will span multiple noncontiguous basic blocks. Th...