135 search results - page 9 / 27 » Analog circuit test based on a digital signature |
ISCAS
2006
IEEE
15 years 3 months ago
2006
IEEE
Abstract- Analog iterative decoders offer several advantages over their digital counterparts in terms of speed and power -A- log-MAP consumption. The current state of art CMOS anal...
EH
2004
IEEE
15 years 1 months ago
2004
IEEE
The work presented here tackles the problem of designing a unipolar 6-bit digital-to-analog converter (DAC) with a voltage mode output by hardware evolution. Thereby a Field Progr...
ITC
2000
IEEE
15 years 2 months ago
2000
IEEE
An area efficient and robust integrated test core for mixed-signal circuits is described. The core consists of a completely digital implementation, except for a simple reconstructi...
FMSD
2010
14 years 8 months ago
2010
Abstract Modeling and Simulation Aided Verification of Analog/MixedSignal Circuits S. Little and C. Myers (University of Utah, USA) Monday, July 14, 14:00-17:00 4 14:00-14:40 fSpic...
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ISCAS
2005
IEEE
15 years 3 months ago
2005
IEEE
A subthreshold-leakage suppressed switched capacitor (SC) circuit based on super cut-off CMOS (SCCMOS) scheme is introduced. This scheme realizes low-voltage SC circuits using low...