Sciweavers

5268 search results - page 339 / 1054
» Analysis of Design Process Dynamics
Sort
View
IOLTS
2006
IEEE
103views Hardware» more  IOLTS 2006»
15 years 11 months ago
Designing Robust Checkers in the Presence of Massive Timing Errors
So far, performance and reliability of circuits have been determined by worst-case characterization of silicon and environmental noise. As new deep sub-micron technologies exacerb...
Frederic Worm, Patrick Thiran, Paolo Ienne
SAC
2004
ACM
15 years 10 months ago
Design and implementation of component-based adaptive Web presentations
Engineering adaptive Web applications implies the development of content that can be automatically adjusted to varying client devices and user preferences. To meet this requiremen...
Zoltán Fiala, Michael Hinz, Geert-Jan Hoube...
ISLPED
1996
ACM
83views Hardware» more  ISLPED 1996»
15 years 9 months ago
12-b 125 MSPS CMOS D/A designed for spectral performance
A 12-b 125 MSPS, digital to analog converter fabricated on a 0.6 micron single poly double metal CMOS process is presented. The design operates on supply voltages from 2.7 to 5.5 ...
Douglas Mercer, Larry Singer
HCI
2007
15 years 6 months ago
User-Centred Design Approach for a Community Website with Social Software
Social software and web 2.0 live on the fact that people want to share and collaborate. This feeling of connecting with each other as well as helping and sharing information can be...
Ilse Bakx
DAC
2004
ACM
16 years 5 months ago
Profile-guided microarchitectural floorplanning for deep submicron processor design
As process technology migrates to deep submicron with feature size less than 100nm, global wire delay is becoming a major hindrance in keeping the latency of intra-chip communicat...
Mongkol Ekpanyapong, Jacob R. Minz, Thaisiri Watew...