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DATE
1998
IEEE
73views Hardware» more  DATE 1998»
15 years 4 months ago
On Removing Multiple Redundancies in Combinational Circuits
1 Redundancy removal is an important step in combinational logic optimization. After a redundant wire is removed, other originally redundant wires may become irredundant, and some ...
David Ihsin Cheng
PLDI
1997
ACM
15 years 4 months ago
Generational Garbage Collection and the Radioactive Decay Model
If a fixed exponentially decreasing probability distribution function is used to model every object’s lifetime, then the age of an object gives no information about its future ...
William D. Clinger, Lars Thomas Hansen
FCCM
2009
IEEE
106views VLSI» more  FCCM 2009»
15 years 3 months ago
Optimal Placement-aware Trace-Based Scheduling of Hardware Reconfigurations for FPGA Accelerators
Modern use of FPGAs as hardware accelerators involves the partial reconfiguration of hardware resources as the application executes. In this paper, we present a polynomial time al...
Joon Edward Sim, Weng-Fai Wong, Jürgen Teich
AISC
2006
Springer
15 years 3 months ago
Finding Relations Among Linear Constraints
In program analysis and verification, there are some constraints that have to be processed repeatedly. A possible way to speed up the processing is to find some relations among the...
Jun Yan, Jian Zhang, Zhongxing Xu
GECCO
2006
Springer
135views Optimization» more  GECCO 2006»
15 years 3 months ago
The no free lunch and realistic search algorithms
The No-Free-Lunch theorems (NFLTs) are criticized for being too general to be of any relevance to the real world scenario. This paper investigates, both formally and empirically, ...
Yossi Borenstein, Riccardo Poli