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CSREAESA
2003
14 years 11 months ago
Worst Case Execution Time Analysis for Petri Net Models of Embedded Systems
We present an approach for Worst-Case Execution Time (WCET) Analysis of embedded system software, that is generated from Petri net specifications. The presented approach is part ...
Friedhelm Stappert, Carsten Rust
DATE
2010
IEEE
160views Hardware» more  DATE 2010»
15 years 3 months ago
Soft error-aware design optimization of low power and time-constrained embedded systems
— In this paper, we examine the impact of application task mapping on the reliability of MPSoC in the presence of single-event upsets (SEUs). We propose a novel soft erroraware d...
Rishad A. Shafik, Bashir M. Al-Hashimi, Krishnendu...
VLSID
2007
IEEE
206views VLSI» more  VLSID 2007»
15 years 10 months ago
MAX: A Multi Objective Memory Architecture eXploration Framework for Embedded Systems-on-Chip
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...
T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindaraj...
EMSOFT
2005
Springer
15 years 3 months ago
Model-based analysis of distributed real-time embedded system composition
Key challenges in distributed real-time embedded (DRE) system developments include safe composition of system components and mapping the functional specifications onto the target...
Gabor Madl, Sherif Abdelwahed
CODES
2002
IEEE
15 years 3 months ago
Holistic scheduling and analysis of mixed time/event-triggered distributed embedded systems
This paper deals with specific issues related to the design of distributed embedded systems implemented with mixed, eventtriggered and time-triggered task sets, which communicate ...
Traian Pop, Petru Eles, Zebo Peng