- This paper describes new optical switching architectures supporting asynchronous variable-length packets. Output line contention is resolved by optical delay line buffers. By int...
Power-aware processors operate in various power modes to reduce energy consumption with a corresponding decrease in peak processor throughput. Recent work has shown power-aware cl...
We propose, and justify, an economic theory to guide memory system design, operation, and analysis. Our theory treats memory random-access latency, and its cost per installed mega...
Existing virtual memory systems usually work well with applications written in C and C++, but they do not provide adequate support for garbage-collected applications. The performa...
Ting Yang, Emery D. Berger, Scott F. Kaplan, J. El...
Abstract. We propose a new operational model for shared variable concurrency, in the context of a concurrent, higher-order imperative language `a la ML. In our model the scheduling...