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ISCA
2011
IEEE
386views Hardware» more  ISCA 2011»
14 years 1 months ago
Architecting on-chip interconnects for stacked 3D STT-RAM caches in CMPs
Emerging memory technologies such as STT-RAM, PCRAM, and resistive RAM are being explored as potential replacements to existing on-chip caches or main memories for future multi-co...
Asit K. Mishra, Xiangyu Dong, Guangyu Sun, Yuan Xi...
SSD
2005
Springer
93views Database» more  SSD 2005»
15 years 3 months ago
Semantic Caching for Multiresolution Spatial Query Processing in Mobile Environments
Spatial data are particularly useful in mobile environments. However, due to the low bandwidth of most wireless networks, developing large spatial database applications becomes a c...
Sai Sun, Xiaofang Zhou, Heng Tao Shen
86
Voted
CTRSA
2006
Springer
146views Cryptology» more  CTRSA 2006»
15 years 1 months ago
Cache Attacks and Countermeasures: The Case of AES
We describe several software side-channel attacks based on inter-process leakage through the state of the CPU's memory cache. This leakage reveals memory access patterns, whic...
Dag Arne Osvik, Adi Shamir, Eran Tromer
JOC
2010
92views more  JOC 2010»
14 years 4 months ago
Efficient Cache Attacks on AES, and Countermeasures
We describe several software side-channel attacks based on inter-process leakage through the state of the CPU's memory cache. This leakage reveals memory access patterns, whic...
Eran Tromer, Dag Arne Osvik, Adi Shamir
CLUSTER
2008
IEEE
15 years 4 months ago
Context-aware address translation for high performance SMP cluster system
—User-level communication allows an application process to access the network interface directly. Bypassing the kernel requires that a user process accesses the network interface...
Moon-Sang Lee, Joonwon Lee, Seungryoul Maeng