— Timing exceptions in IC implementation processes, especially timing verification, help reduce pessimism that arises from unnecessary timing constraints by masking non-function...
—Double patterning lithography (DPL) provides an attractive alternative or a supplementary method to enable the 32nm and 22nm process nodes, relative to costlier technology optio...
Kwangok Jeong, Andrew B. Kahng, Rasit Onur Topalog...
Abstract—Performance and power issues are becoming increasingly important in the design of large cluster based multitier data centers for supporting a multitude of services. Desi...
We are building an interactive, visual text analysis tool that aids users in analyzing a large collection of text. Unlike existing work in text analysis, which focuses either on d...
Although the availability of large video corpora are on the rise, the value of these datasets remain largely untapped due to the difficulty of analyzing their contents. Automatic ...