834 search results - page 53 / 167 » Anaphora and the Logic of Change |
119
Voted
FPGA
2004
ACM
15 years 6 months ago
2004
ACM
The cost functions used to evaluate logic synthesis transformations for FPGAs are far removed from the final speed and routability determined after placement, routing and timing a...
105
Voted
CADE
1998
Springer
15 years 4 months ago
1998
Springer
Abstract. leanK is a "lean", i.e., extremely compact, Prolog implementation of a free variable tableau calculus for propositional modal logics. leanK 2.0 includes additio...
92
Voted
FOSSACS
2004
Springer
15 years 6 months ago
2004
Springer
People often need to reason about policy changes before they are adopted. For example, suppose a website manager knows that users want to enter her site without going through the w...
113
Voted
EUROPAR
2001
Springer
15 years 5 months ago
2001
Springer
Operand bypass logic might be one of the critical structures for future microprocessors to achieve high clock speed. The delay of the logic imposes the execution time budget to be ...
PATMOS
2005
Springer
15 years 6 months ago
2005
Springer
The time taken for a CMOS logic gate output to change after one or more inputs have changed is called the output delay of the gate. A conventional multi-input CMOS gate is designed...