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ASAP
2000
IEEE
125views Hardware» more  ASAP 2000»
15 years 2 months ago
High Level Modeling for Parallel Executions of Nested Loop Algorithms
High level modeling and (quantitative) performance analysis of signal processing systems requires high level models for the applications(algorithms) and the implementations (archi...
Ed F. Deprettere, Edwin Rijpkema, Paul Lieverse, B...
ISCA
1992
IEEE
113views Hardware» more  ISCA 1992»
15 years 1 months ago
Dynamic Dependency Analysis of Ordinary Programs
A quantitative analysis of program execution is essential to the computer architecture design process. With the current trend in architecture of enhancing the performance of unipr...
Todd M. Austin, Gurindar S. Sohi
EUROPAR
1998
Springer
15 years 1 months ago
Analysing an SQL Application with a BSPlib Call-Graph Profiling Tool
This paper illustrates the use of a post-mortem call-graph profiling tool in the analysis of an SQL query processing application written using BSPIib [4]. Unlike other parallel pro...
Jonathan M. D. Hill, Stephen A. Jarvis, Constantin...
70
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IPPS
2007
IEEE
15 years 3 months ago
Pipelining Tradeoffs of Massively Parallel SuperCISC Hardware Functions
Parallel processing using multiple processors is a well-established technique to accelerate many different classes of applications. However, as the density of chips increases, ano...
Colin J. Ihrig, Justin Stander, Alex K. Jones
IPPS
2002
IEEE
15 years 2 months ago
Massively Parallel Solutions for Molecular Sequence Analysis
In this paper we present new approaches to high performance protein database scanning on two novel massively parallel architectures to gain supercomputer power at low cost. The ï¬...
Bertil Schmidt, Heiko Schröder, Manfred Schim...