422 search results - page 45 / 85 » Application mapping for chip multiprocessors |
IPPS
2003
IEEE
15 years 3 months ago
2003
IEEE
The efficient solution of large systems of linear equations represented by sparse matrices appears in many tasks. LU factorization followed by backward and forward substitutions i...
ICS
2000
Tsinghua U.
15 years 1 months ago
2000
Tsinghua U.
The rapid advancements of networking technology have boosted potential bandwidth to the point that the cabling is no longer the bottleneck. Rather, the bottlenecks lie at the cros...
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MJ
2011
14 years 4 months ago
2011
New tendencies envisage 2D/3D Multi-Processor System-On-Chip (MPSoC) as a promising solution for the consumer electronics market. MPSoCs are complex to design, as they must execute...
FPL
2005
Springer
15 years 3 months ago
2005
Springer
At Leiden University, we are developing a design methodology that allows for fast mapping of nested-loop applications (e.g. DSP, Imaging, or MultiMedia) written in a subset of Matl...
IEEEPACT
2008
IEEE
15 years 4 months ago
2008
IEEE
This paper presents and characterizes the Princeton Application Repository for Shared-Memory Computers (PARSEC), a benchmark suite for studies of Chip-Multiprocessors (CMPs). Prev...