422 search results - page 79 / 85 » Application mapping for chip multiprocessors |
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SASP
2009
IEEE
15 years 4 months ago
2009
IEEE
— As growing power dissipation and thermal effects disrupted the rising clock frequency trend and threatened to annul Moore’s law, the computing industry has switched its route...
VLSID
2002
IEEE
15 years 10 months ago
2002
IEEE
: In this paper, we present a point-to-point (P2P) communication synthesis methodology for SystemOn-Chip (SOC) design. We consider real-time systems where IP selection, mapping and...
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IPPS
2009
IEEE
15 years 4 months ago
2009
IEEE
In this paper, we empirically evaluate fundamental design trade-offs among the most recent multicore processors and accelerator technologies. Our primary aim is to aid application...
DFT
2006
IEEE
15 years 3 months ago
2006
IEEE
This paper1 discusses a defect tolerant and energy economized computing array for the DSP plane of a 3-D Heterogeneous System on a Chip. We present the J-platform, which employs c...
CODES
2005
IEEE
15 years 3 months ago
2005
IEEE
In this paper, we present a new architectural concept for network processors called FlexPath NP. The central idea behind FlexPath NP is to systematically map network processor (NP...