3171 search results - page 362 / 635 » Application of Reduce Order Modeling to Time Parallelization |
171
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CORR
2011
Springer
14 years 8 months ago
2011
Springer
The Model Checking Integrated Planning System (MIPS) has shown distinguished performance in the second and third international planning competitions. With its object-oriented fram...
167
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IPPS
2010
IEEE
15 years 1 months ago
2010
IEEE
Abstract--Ensuring the correctness of complex implementations of software transactional memory (STM) is a daunting task. Attempts have been made to formally verify STMs, but these ...
162
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IPPS
2006
IEEE
15 years 10 months ago
2006
IEEE
Modern FPGA platforms provide the hardware and software infrastructure for building a bus-based System on Chip (SoC) that meet the applications requirements. The designer can cust...
126
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IPPS
2007
IEEE
15 years 10 months ago
2007
IEEE
Replicating data objects onto servers across a system can alleviate access delays. The selection of data objects and servers requires solving a constraint optimization problem, wh...
149
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GLVLSI
2008
IEEE
15 years 11 months ago
2008
IEEE
Due to the large contribution of the memory subsystem to total system power, the memory subsystem is highly amenable to customization for reduced power/energy and/or improved perf...