Sciweavers

3171 search results - page 490 / 635
» Application of Reduce Order Modeling to Time Parallelization
Sort
View
ICDE
2005
IEEE
139views Database» more  ICDE 2005»
16 years 4 months ago
Compressing Bitmap Indices by Data Reorganization
Many scientific applications generate massive volumes of data through observations or computer simulations, bringing up the need for effective indexing methods for efficient stora...
Ali Pinar, Tao Tao, Hakan Ferhatosmanoglu
107
Voted
IPPS
2007
IEEE
15 years 9 months ago
Improving Data Access Performance with Server Push Architecture
Data prefetching, where data is fetched before CPU demands for it, has been considered as an effective solution to mask data access latency. However, the current client-initiated ...
Xian-He Sun, Surendra Byna, Yong Chen
124
Voted
IPPS
2005
IEEE
15 years 9 months ago
Technology-based Architectural Analysis of Operand Bypass Networks for Efficient Operand Transport
As semiconductor feature sizes decrease, interconnect delay is becoming a dominant component of processor cycle times. This creates a critical need to shift microarchitectural des...
Hongkyu Kim, D. Scott Wills, Linda M. Wills
135
Voted
IPPS
2003
IEEE
15 years 8 months ago
Homeostatic and Tendency-Based CPU Load Predictions
The dynamic nature of a resource-sharing environment means that applications must be able to adapt their behavior in response to changes in system status. Predictions of future sy...
Lingyun Yang, Ian T. Foster, Jennifer M. Schopf
ISPAN
2002
IEEE
15 years 8 months ago
Automatic Processor Lower Bound Formulas for Array Computations
In the directed acyclic graph (dag) model of algorithms, consider the following problem for precedence-constrained multiprocessor schedules for array computations: Given a sequenc...
Peter R. Cappello, Ömer Egecioglu