3171 search results - page 497 / 635 » Application of Reduce Order Modeling to Time Parallelization |
133
Voted
HPDC
2000
IEEE
15 years 7 months ago
2000
IEEE
In this paper, we present a performance evaluation of a wide-area cluster system based on a rewallenabled Globus metacomputing toolkit. In order to establish communication links ...
114
Voted
SPAA
1990
ACM
15 years 7 months ago
1990
ACM
We present various experiments in Hardware/Software designtradeoffs met in speeding up long integer multiplications. This work spans over a year, with more than 12 different hardw...
121
Voted
ISCA
1997
IEEE
15 years 7 months ago
1997
IEEE
The SGI Origin 2000 is a cache-coherent non-uniform memory access (ccNUMA) multiprocessor designed and manufactured by Silicon Graphics, Inc. The Origin system was designed from t...
118
Voted
IPPS
2007
IEEE
15 years 9 months ago
2007
IEEE
— Modern CPUs operate at GHz frequencies, but the latencies of memory accesses are still relatively large, in the order of hundreds of cycles. Deeper cache hierarchies with large...
137
Voted
HIPC
1999
Springer
15 years 7 months ago
1999
Springer
Abstract. In this work we put into evidence how the memory performance of a WebServer machine may depend on the sharing induced by process migration. We considered a shared-bus sha...