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» Application of Reduce Order Modeling to Time Parallelization
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134
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DAC
1996
ACM
15 years 7 months ago
A Parallel Precorrected FFT Based Capacitance Extraction Program for Signal Integrity Analysis
In order to optimize interconnect to avoid signal integrity problems, very fast and accurate 3-D capacitance extraction is essential. Fast algorithms, such as the multipole or prec...
Narayan R. Aluru, V. B. Nadkarni, James White
ASAP
2007
IEEE
122views Hardware» more  ASAP 2007»
15 years 9 months ago
Parallelizing HMMER for Hardware Acceleration on FPGAs
Profile based Hidden Markov Model is a widely used tool in bioinformatics. While being very valuable to biologists, it is extremely compute intensive and suffers from prohibitive...
Steven Derrien, Patrice Quinton
DATE
2004
IEEE
184views Hardware» more  DATE 2004»
15 years 6 months ago
Automatic Verification of Safety and Liveness for XScale-Like Processor Models Using WEB Refinements
We show how to automatically verify that complex XScale-like pipelined machine models satisfy the same safety and liveness properties as their corresponding instruction set archit...
Panagiotis Manolios, Sudarshan K. Srinivasan
COMAD
2008
15 years 4 months ago
Exploiting Asynchronous IO using the Asynchronous Iterator Model
Asynchronous IO (AIO) allows a process to continue to do other work while an IO operation initiated earlier completes. AIO allows a large number of random IO operations to be issu...
Suresh Iyengar, S. Sudarshan, Santosh Kumar 0002, ...
157
Voted
ICPP
2000
IEEE
15 years 7 months ago
Nonblocking WDM Multicast Switching Networks
ÐWith ever increasing demands on bandwidth from emerging bandwidth-intensive applications, such as video conferencing, E-commerce, and video-on-demand services, there has been an ...
Yuanyuan Yang, Jianchao Wang, Chunming Qiao