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IPPS
2007
IEEE
15 years 4 months ago
Load Miss Prediction - Exploiting Power Performance Trade-offs
— Modern CPUs operate at GHz frequencies, but the latencies of memory accesses are still relatively large, in the order of hundreds of cycles. Deeper cache hierarchies with large...
Konrad Malkowski, Greg M. Link, Padma Raghavan, Ma...
IROS
2007
IEEE
254views Robotics» more  IROS 2007»
15 years 4 months ago
3D datasets segmentation based on local attribute variation
— We present a Graph-based method for low-level segmentation of unfiltered 3D data. The core of this approach is based on the construction of a local neighborhood structure and ...
Carla Silva Rocha Aguiar, Sébastien Druon, ...
WAIM
2007
Springer
15 years 4 months ago
A New DBMS Architecture for DB-IR Integration
Nowadays, as there is an increasing need to integrate the DBMS (for structured data) with Information Retrieval (IR) features (for unstructured data), DB-IR integration becomes one...
Kyu-Young Whang
SIGSOFT
2006
ACM
15 years 3 months ago
Bit level types for high level reasoning
Bitwise operations are commonly used in low-level systems code to access multiple data fields that have been packed into a single word. Program analysis tools that reason about s...
Ranjit Jhala, Rupak Majumdar
ALT
2003
Springer
15 years 1 months ago
Efficiently Learning the Metric with Side-Information
Abstract. A crucial problem in machine learning is to choose an appropriate representation of data, in a way that emphasizes the relations we are interested in. In many cases this ...
Tijl De Bie, Michinari Momma, Nello Cristianini