- The accelerator is destined to circuit-level simulation of digital and analog/digital MOS VLSI'c containing of up to 100 thousand transistors (with 16 Mb RAM host-machine). ...
We present an alternative approach to standard geometric shape editing using physically-based simulation. With our technique, the user can deform complex objects in real-time. The...
Johannes Mezger, Bernhard Thomaszewski, Simon Pabs...
—This paper provides analytical expressions to evaluate the performance of a random access wireless network in terms of user throughput and network throughput, subject to the con...
— We consider nonlinear detection in rank-deficient multiple-antenna assisted beamforming systems. By exploiting the inherent symmetry of the underlying optimal Bayesian detecti...
—In this paper, we present a near-lossless compression scheme for scalar-quantized source codec parameters based on iterative source-channel decoding (ISCD). The scheme is compar...
Laurent Schmalen, Peter Vary, Thorsten Clevorn, Ma...