1308 search results - page 93 / 262 » Architectural Support for Dynamic Linking |
107
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ICCD
2003
IEEE
16 years 29 days ago
2003
IEEE
We present a methodology for a power-optimized, software-controlled Translation Lookaside Buffer (TLB) organization. A highly reduced number of Virtual Page Number (VPN) bits sufï...
142
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ISORC
2006
IEEE
15 years 10 months ago
2006
IEEE
The fault tolerance provided by FT-CORBA is basically static, that is, once the fault tolerance properties of a group of replicated processes defined, they cannot be modified in r...
145
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MICRO
1991
IEEE
15 years 7 months ago
1991
IEEE
This paper examines two alternative approaches to supporting code scheduling for multiple-instruction-issue processors. One is to provide a set of non-trapping instructions so tha...
128
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DAC
2002
ACM
16 years 5 months ago
2002
ACM
Tools and a design methodology have been developed to support partial run-time reconfiguration of FPGA logic on the Field Programmable Port Extender. High-speed Internet packet pr...
145
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CODES
2007
IEEE
15 years 10 months ago
2007
IEEE
We present a dynamic optimization technique, thread warping, that uses a single processor on a multiprocessor system to dynamically synthesize threads into custom accelerator circ...