312 search results - page 20 / 63 » Architectural approaches to reduce leakage energy in caches |
103
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DATE
2003
IEEE
15 years 5 months ago
2003
IEEE
This paper presents a on-chip stack based memory organization that effectively reduces the energy dissipation in programmable embedded system architectures. Most embedded systems ...
MICRO
1999
IEEE
15 years 4 months ago
1999
IEEE
Increasing levels of microprocessor power dissipation call for new approaches at the architectural level that save energy by better matching of on-chip resources to application re...
PDIS
1994
IEEE
15 years 3 months ago
1994
IEEE
We propose a new client-side data-caching scheme for relational databases with a central server and multiple clients. Data are loaded into each client cache based on queries execut...
ASPDAC
2008
ACM
15 years 1 months ago
2008
ACM
Horizontally Partitioned Caches (HPCs) are a promising architectural feature to reduce the energy consumption of the memory subsystem. However, the energy reduction obtained using...
108
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CF
2007
ACM
2007
ACM
Adaptive VP decay: making value predictors leakage-efficient designs for high performance processors
15 years 3 months ago
Energy-efficient microprocessor designs are one of the major concerns in both high performance and embedded processor domains. Furthermore, as process technology advances toward d...