312 search results - page 37 / 63 » Architectural approaches to reduce leakage energy in caches |
MICRO
2007
IEEE
15 years 6 months ago
2007
IEEE
The microarchitectural design space of a new processor is too large for an architect to evaluate in its entirety. Even with the use of statistical simulation, evaluation of a sing...
PDP
2010
IEEE
15 years 4 months ago
2010
IEEE
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...
110
click to vote
GECCO
2004
Springer
15 years 5 months ago
2004
Springer
Portable embedded systems are being driven by consumer demands to be thermally efficient, perform faster, and have longer battery life. To design such a system, various hardware un...
ISLPED
2003
ACM
15 years 5 months ago
2003
ACM
Tag comparison elimination (TCE) is an effective approach to reduce I-cache energy. Current research focuses on finding good tradeoffs between hardware cost and percentage of comp...
EENERGY
2010
15 years 3 months ago
2010
Power consumption of the Information and Communication Technology sector (ICT) has recently become a key challenge. In particular, actions to improve energy-efficiency of Internet...