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» Architectural approaches to reduce leakage energy in caches
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STORAGESS
2005
ACM
15 years 5 months ago
Expecting the unexpected: adaptation for predictive energy conservation
The use of access predictors to improve storage device performance has been investigated for both improving access times, as well as a means of reducing energy consumed by the dis...
Jeffrey P. Rybczynski, Darrell D. E. Long, Ahmed A...
ISCA
2011
IEEE
365views Hardware» more  ISCA 2011»
14 years 3 months ago
Kilo-NOC: a heterogeneous network-on-chip architecture for scalability and service guarantees
Today’s chip-level multiprocessors (CMPs) feature up to a hundred discrete cores, and with increasing levels of integration, CMPs with hundreds of cores, cache tiles, and specia...
Boris Grot, Joel Hestness, Stephen W. Keckler, Onu...
IPPS
2006
IEEE
15 years 5 months ago
Conjugate gradient sparse solvers: performance-power characteristics
We characterize the performance and power attributes of the conjugate gradient (CG) sparse solver which is widely used in scientific applications. We use cycle-accurate simulatio...
Konrad Malkowski, Ingyu Lee, Padma Raghavan, Mary ...
ASPDAC
2004
ACM
107views Hardware» more  ASPDAC 2004»
15 years 5 months ago
Fast, predictable and low energy memory references through architecture-aware compilation
The design of future high-performance embedded systems is hampered by two problems: First, the required hardware needs more energy than is available from batteries. Second, curren...
Peter Marwedel, Lars Wehmeyer, Manish Verma, Stefa...
ASPDAC
2006
ACM
109views Hardware» more  ASPDAC 2006»
15 years 5 months ago
Energy savings through embedded processing on disk system
Abstract— Many of today’s data-intensive applications manipulate disk-resident data sets. As a result, their overall behavior is tightly coupled with their disk performance. Un...
Seung Woo Son, Guangyu Chen, Mahmut T. Kandemir, F...